A conventional ESD protection circuit 200 as illustrated in FIG. 6 includes an RC circuit 210, a CMOS inverter 220 electrically connected with the RC circuit 210, and a silicon controlled rectifier 230 electrically connected with the CMOS inverter 220. A traditional ESD detection can be achieved through combination of the RC circuit 210 and MOS capacitors owning to the reason that MOS capacitors possess the largest capacitance per unit area in the CMOS processes. However, with advanced process in semiconductor industry entering a nanoscale era, the gate oxide layer of the MOS device in nanoscale CMOS technology gradually becomes thinner and thinner, which results in severe gate leakage current of the MOS device caused by gate tunneling effect so as to make relative circuits perform a failed operation.